J. M. Rabaey and M. Pedram, "Low power design methodologies,"
Kluwer Academic Publishers, Boston, 1996, pp. 65-95.
 Y. Moon and D. K. Jeong, "A 32 x 32-b adiabatic register file with supply
clock generator," IEEE Journal of Solid-State Circuits, vol. 33, no. 5,
1998, pp. 696 -701.
 K. W. Ng and K. T. Lau, "A novel adiabatic register file design," Journal
of Circuits, Systems, and Computers, vol. 10, no. 1, 2000, pp. 67-76.
 Jianping Hu, Tiefeng Xu, and Hong Li, "A lower-power register file
based on complementary pass-transistor adiabatic logic," IEICE
Transactions on Information and Systems, vol. E88-D, no. 7, 2005, pp.
 Jianping Hu, Binbin Liu, Xuanyan Hu, and Sheng Zhang, "A Test Chip
for CPAL Register File Fabricated in Chartered 0.35╬╝m CMOS Process,"
IEEE Midwest Symposium on Circuits and Systems, 10-13 Aug. 2008, pp.
434 - 437.
 J. -H. Kwon, J. Lim, and S. -I. Chae, "Three-port nRERL register file for
ultra-low-energy applications," The International Symposium on Low
Power Electronics and Design, Digest of Technical Papers, 2000, pp.
 S. Kim, C. H. Ziesler, and M. C. Papaefthymiou, "A true single-phase
energy-recovery multiplier," IEEE Transactions on Very Large Scale
Integration (VLSI) Systems, vol. 11, no. 2, 2003, pp.194-207.
 D. Maksimovic, V. G. Oklobdzija, B. Nikolic, and K. W. Current,
"Clocked CMOS adiabatic logic with integrated single-phase
power-clock supply," IEEE Transactions on Very Large Scale
Integration (VLSI) Systems, vol. 8, no. 4, 2000, pp. 460-463.
 D. Maksimovic and V. G. Oklobdzija, "Integrated power clock generators
for low energy logic," IEEE Power Electronics Specialists Conference,
Atlanta, June 1995, pp.61-67.
 Jianping Hu, Tiefeng Xu, and Yinshui Xia, "Low-power adiabatic
sequential circuits with complementary pass-transistor logic," IEEE
Midwest Symposium on Circuits and Systems, USA, August 7-10, 2005,
 H. Mahmoodi-Meimand and A. Afzali-Kusha, "Efficient power clock
generation for adiabatic logic," IEEE International Symposium on
Circuits and Systems, 2001, pp.642-645.
 Dong Zhou, Jianping Hu, and Ling Wang, "Adiabatic Flip-Flops for
Power-Down Applications," IEEE International Symposium on
Integrated Circuits, Singapore, 2007, pp. 493-496.