In this report, an OTA which is used in fully
differential pipelined ADC was described. Using gain-boost
architecture with difference-ended amplifier, this OTA achieve
high-gain and high-speed. Besides, the CMFB circuit is also used, and
some methods are concerned to improve the performance. Then, by
optimization the layout design, OTA-s mismatch was reduced. This
design was using TSMC 0.18um CMOS process and simulation both
schematic and layout in Cadence. The result of the simulation shows
that the OTA has a gain up to 80dB,a unity gain bandwidth of about
1.437GHz for a 2pF load, a slew rate is about 428V/μs, a output swing
is 0.2V~1.35V, with the power supply of 1.8V, the power
consumption is 88mW. This amplifier was used in a 10bit 150MHz
 D. J. Huber, R. J. Chandler, "A 10b 160 MS/s 84mW 1V sub-ranging
ADC in 90nm CMOS," ISSCC Dig Tech Papers, pp. 455, 2007.
 Thomas.Lee, "Optimal design of a CMOS op-amp via geometric
programming, " IEEE Trans. Computer Design of Integrated Circuits and
Systems, vol. 20, no. 1, pp. 191-199, 2001.
 O. Choksi, R. L. Carley, "Analysis of switched-capacitor common-mode
feedback circuit," IEEE Trans. Circuits Syst II, vol. 50, no. 12, pp. 906,
 Sackinger, W. Guggenbuhl, "A high - impedance MOS cascode circuit,"
IEEE Journal of Solid - State Circuit , vol 25, no.1, pp.289-298, February
 R. Hogervorst, "Design of low-voltage low-power CMOS operational
amplifier cells," Delft, The Netherlands: Delft University Press,1996.
 PR. Gray, PJ Hurst, "Analysis and Design of Analog Integrated
Circuit,"Inc. 4th edition, 160-183, 2004.