Stable Delta-Sigma Modulator with Signal Dependent Forward Path Gain for Industrial Applications
Higher order ΔΣ Modulator (DSM) is basically an
unstable system. The approximate conditions for stability cannot be
used for the design of a DSM for industrial applications where risk is
involved. The existing second order, single stage, single bit, unity
feedback gain , discrete DSM cannot be used for the normalized full
range (-1 to +1) of an input signal since the DSM becomes unstable
when the input signal is above ±0.55. The stability is also not
guaranteed for input signals of amplitude less than ±0.55. In the
present paper, the above mentioned second order DSM is modified
with input signal dependent forward path gain. The proposed DSM is
suitable for industrial applications where one needs the digital
representation of the analog input signal, during each sampling
period. The proposed DSM can operate almost for the full range of
input signals (-0.95 to +0.95) without causing instability, assuming
that the second integrator output should not exceed the circuit supply
voltage, ±15 Volts.
 Richard Schreier, Gabor C. Temes, Understanding Delta-Sigma
DataConverters, (IEEE Press, 2005).
 S.R. Norsworthy, R.Schreier and G.C. Temes, Eds., Delta-Sigma Data
Converters, (IEEE Press, 1997).
 George I Bourdopoulos, Delta-Sigma Modulators Modeling, Design and
Applications, (Imperial College Press, 2003).
 S. Hein and A. Zahor, “On the stability of interpolative sigma delta
modulators,” IEEE Transcations on Signal Processing, Vol.41, No.7,
July (1993), pp. 2322-2348.
 Bourdopoulos G.I. “Adaptive order reduction scheme for high-order
single-bit ΔΣModulators” IEEE Transactions on Circuits and Systems,
Vol. 51, No. 5, pp. 213- 216,2004.
 Maghari N., Kwon S., Temes G.C. and Moon U. “Mixed – Order Sturdy
MASH Δ-Σ Modulator”IEEE International symposium on Circuits and
Systems, pp. 257-260, 2007.
 Jiaxin, Wanrong Zhang, Haolin Du, Yanfeng Jiang and YaminZhang )
“New architecture of low voltage Sigma-Delta ADC” IEEE 8th
International Conference on ASIC, pp. 203-206, 2009.
 Yavari M, Shoaei O and Rodriguez-Vazquez A “Double-sampling
single-loop Sigma-Delta Modulator topologies for broad- band
applications” IEEE Transactions on Circuits and Systems II, Vol.53,
No.4, pp. 314-318,2007.
 Maghari N., Temes G.C. and Moon U. “Single loop ΔΣ modulator with
extended dynamic range” Electronics letters, Vol.44, No.25, pp. 1452-
 Yongsheng Wang ; Yuanhong Li ; Mingyan Yu “A 16 bit low voltage
low power Delta Sigma modulator”, Conference on Electronic and
Mechanical Engineering and Information Technology (EMEIT), 2011
Vol. 6, Pages: 3178 – 3181.
 Mohammadi, R. , Shamsi, H. , Abedinkhan, M., “On the designof a 2-2-
0 MASH delta-sigma-pipeline modulator”, IEEE International
Conference on Electronics, Circuits and Systems (ICECS), 2012 ,
Page(s): 348 - 351 .
 Athar S., Siddiqi M.A. , Masud S. “Design and FPGA Implementation
of a 2nd Order Adaptive delta signma modulator with One Bit
Quantization”, 2010 , Page(s): 388 – 393.
 Youngjae Jung, HyungdongRoh, “An Input-Feedforward Multibit
Adder-Less Modulator for Ultrasound Imaging Systems”, IEEE
Transactions on Instrumentation and Measurement, Vol.62, No.8,
August 2013, Pages 2215-2227.