Open Science Research Excellence
%0 Journal Article
%A Sangeeta Singh and  Pankaj Kumar and  P. N. Kondekar
%D 2014 
%J  International Journal of Electrical, Computer, Energetic, Electronic and Communication Engineering
%B World Academy of Science, Engineering and Technology
%I International Science Index 94, 2014
%T Transient Analysis & Performance Estimation of Gate Inside Junctionless Transistor (GI-JLT)
%U http://waset.org/publications/10000386
%V 94
%X In this paper, the transient device performance analysis
of n-type Gate Inside JunctionLess Transistor (GI-JLT) has been
evaluated. 3-D Bohm Quantum Potential (BQP) transport device
simulation has been used to evaluate the delay and power dissipation
performance. GI-JLT has a number of desirable device parameters
such as reduced propagation delay, dynamic power dissipation,
power and delay product, intrinsic gate delay and energy delay
product as compared to Gate-all-around transistors GAA-JLT. In
addition to this, various other device performance parameters namely,
on/off current ratio, short channel effects (SCE), transconductance
Generation Factor (TGF) and unity gain cut-off frequency (fT ) and
subthreshold slope (SS) of the GI-JLT and GAA-JLT have been
analyzed and compared. GI-JLT shows better device performance
characteristics than GAA-JLT for low power and high frequency
applications, because of its larger gate electrostatic control on the
device operation.

%P 1648 - 1652