Open Science Research Excellence
@article{(International Science Index):http://waset.org/publications/10004775,
  title    = {High-Efficiency Comparator for Low-Power Application},
  author    = {M. Yousefi and  N. Nasirzadeh},
  country   = {Iran, Islamic Republic Of},
  institution={Azarbaijan Shahid Madani University},
  abstract  = {In this paper, dynamic comparator structure employing two methods for power consumption reduction with applications in low-power high-speed analog-to-digital converters have been presented. The proposed comparator has low consumption thanks to power reduction methods. They have the ability for offset adjustment. The comparator consumes 14.3 μW at 100 MHz which is equal to 11.8 fJ. The comparator has been designed and simulated in 180 nm CMOS. Layouts occupy 210 μm2.},
    journal   = {International Journal of Electrical, Computer, Energetic, Electronic and Communication Engineering},  volume    = {10},
  number    = {7},
  year      = {2016},
  pages     = {849 - 852},
  ee        = {http://waset.org/publications/10004775},
  url       = {http://waset.org/Publications?p=115},
  bibsource = {http://waset.org/Publications},
  issn      = {eISSN:1307-6892},
  publisher = {World Academy of Science, Engineering and Technology},
  index     = {International Science Index 115, 2016},
}