Open Science Research Excellence
@article{(International Science Index):,
  title    = {A Low Power SRAM Base on Novel Word-Line Decoding},
  author    = {Arash Azizi Mazreah and  Mohammad T. Manzuri Shalmani and  Hamid Barati and  Ali Barati and  Ali Sarchami},
  country   = {},
  abstract  = {This paper proposes a low power SRAM based on
five transistor SRAM cell. Proposed SRAM uses novel word-line
decoding such that, during read/write operation, only selected cell
connected to bit-line whereas, in conventional SRAM (CV-SRAM),
all cells in selected row connected to their bit-lines, which in turn
develops differential voltages across all bit-lines, and this makes
energy consumption on unselected bit-lines. In proposed SRAM
memory array divided into two halves and this causes data-line
capacitance to reduce. Also proposed SRAM uses one bit-line and
thus has lower bit-line leakage compared to CV-SRAM.
Furthermore, the proposed SRAM incurs no area overhead, and has
comparable read/write performance versus the CV-SRAM.
Simulation results in standard 0.25μm CMOS technology shows in
worst case proposed SRAM has 80% smaller dynamic energy
consumption in each cycle compared to CV-SRAM. Besides, energy
consumption in each cycle of proposed SRAM and CV-SRAM
investigated analytically, the results of which are in good agreement
with the simulation results.},
    journal   = {International Journal of Computer, Electrical, Automation, Control and Information Engineering},  volume    = {2},
  number    = {3},
  year      = {2008},
  pages     = {649 - 653},
  ee        = {},
  url       = {},
  bibsource = {},
  issn      = {eISSN:1307-6892},
  publisher = {World Academy of Science, Engineering and Technology},
  index     = {International Science Index 15, 2008},