Scholarly Research Excellence

Digital Open Science Index

Commenced in January 2007 Frequency: Monthly Edition: International Paper Count: 36

Bias Optimization of Mach-Zehnder Modulator Considering RF Gain on OFDM Radio-Over-Fiber System

Most of the recent wireless LANs, broadband access networks, and digital broadcasting use Orthogonal Frequency Division Multiplexing techniques. In addition, the increasing demand of Data and Internet makes fiber optics an important technology, as fiber optics has many characteristics that make it the best solution for transferring huge frames of Data from a point to another. Radio over fiber is the place where high quality RF is converted to optical signals over single mode fiber. Optimum values for the bias level and the switching voltage for Mach-Zehnder modulator are important for the performance of radio over fiber links. In this paper, we propose a method to optimize the two parameters simultaneously; the bias and the switching voltage point of the external modulator of a radio over fiber system considering RF gain. Simulation results show the optimum gain value under these two parameters.

Earnings-Related Information, Cognitive Bias, and the Disposition Effect
This paper discusses the reaction of investors in the Taiwan stock market to the most probable unknown earnings-related information and the most probable known earnings-related information. As compared with the previous literature regarding the effect of an official announcement of earnings forecast revision, this paper further analyzes investors’ cognitive bias toward the unknown and known earnings-related information, and the role of media during the investors' reactions to the foresaid information shocks. The empirical results show that both the unknown and known earnings-related information provides useful information content for a stock market. In addition, cognitive bias and disposition effect are the behavioral pitfalls that commonly occur in the process of the investors' reactions to the earnings-related information. Finally, media coverage has a remarkable influence upon the investors' trading decisions.
Building Information Modelling for Construction Delay Management

The Kingdom of Saudi Arabia (KSA) is not an exception in relying on the growth of its construction industry to support rapid population growth. However, its need for infrastructure development is constrained by low productivity levels and cost overruns caused by factors such as delays to project completion. Delays in delivering a construction project are a global issue and while theories such as Optimism Bias have been used to explain such delays, in KSA, client-related causes of delays are also significant. The objective of this paper is to develop a framework-based approach to explore how the country’s construction industry can manage and reduce delays in construction projects through building information modelling (BIM) in order to mitigate the cost consequences of such delays.  It comprehensively and systematically reviewed the global literature on the subject and identified gaps, critical delay factors and the specific benefits that BIM can deliver for the delay management.  A case study comprising of nine hospital projects that have experienced delay and cost overruns was also carried out. Five critical delay factors related to the clients were identified as candidates that can be mitigated through BIM’s benefits. These factors are: Ineffective planning and scheduling of the project; changes during construction by the client; delay in progress payment; slowness in decision making by the client; and poor communication between clients and other stakeholders. In addition, data from the case study projects strongly suggest that optimism bias is present in many of the hospital projects. Further validation via key stakeholder interviews and documentations are planned.

Design of 900 MHz High Gain SiGe Power Amplifier with Linearity Improved Bias Circuit

A 900 MHz three-stage SiGe power amplifier (PA) with high power gain is presented in this paper. Volterra Series is applied to analyze nonlinearity sources of SiGe HBT device model clearly. Meanwhile, the influence of operating current to IMD3 is discussed. Then a β-helper current mirror bias circuit is applied to improve linearity, since the β-helper current mirror bias circuit can offer stable base biasing voltage. Meanwhile, it can also work as predistortion circuit when biasing voltages of three bias circuits are fine-tuned, by this way, the power gain and operating current of PA are optimized for best linearity. The three power stages which fabricated by 0.18 μm SiGe technology are bonded to the printed circuit board (PCB) to obtain impedances by Load-Pull system, then matching networks are done for best linearity with discrete passive components on PCB. The final measured three-stage PA exhibits 21.1 dBm of output power at 1 dB compression point (OP1dB) with power added efficiency (PAE) of 20.6% and 33 dB power gain under 3.3 V power supply voltage.

Inverter Based Gain-Boosting Fully Differential CMOS Amplifier

This work presents a fully differential CMOS amplifier consisting of two self-biased gain boosted inverter stages, that provides an alternative to the power hungry operational amplifier. The self-biasing avoids the use of external biasing circuitry, thus reduces the die area, design efforts, and power consumption. In the present work, regulated cascode technique has been employed for gain boosting. The Miller compensation is also applied to enhance the phase margin. The circuit has been designed and simulated in 1.8 V 0.18 µm CMOS technology. The simulation results show a high DC gain of 100.7 dB, Unity-Gain Bandwidth of 107.8 MHz, and Phase Margin of 66.7o with a power dissipation of 286 μW and makes it suitable candidate for the high resolution pipelined ADCs.

Influence of Measurement System on Negative Bias Temperature Instability Characterization: Fast BTI vs Conventional BTI vs Fast Wafer Level Reliability
Negative Bias Temperature Instability (NBTI) is one of the critical degradation mechanisms in semiconductor device reliability that causes shift in the threshold voltage (Vth). However, thorough understanding of this reliability failure mechanism is still unachievable due to a recovery characteristic known as NBTI recovery. This paper will demonstrate the severity of NBTI recovery as well as one of the effective methods used to mitigate, which is the minimization of measurement system delays. Comparison was done in between two measurement systems that have significant differences in measurement delays to show how NBTI recovery causes result deviations and how fast measurement systems can mitigate NBTI recovery. Another method to minimize NBTI recovery without the influence of measurement system known as Fast Wafer Level Reliability (FWLR) NBTI was also done to be used as reference.
Measurement of CES Production Functions Considering Energy as an Input

Because of its flexibility, CES attracts much interest in economic growth and programming models, and the macroeconomics or micro-macro models. This paper focuses on the development, estimating methods of CES production function considering energy as an input. We leave for future research work of relaxing the assumption of constant returns to scale, the introduction of potential input factors, and the generalization method of the optimal nested form of multi-factor production functions.

A Comparative Study on Optimized Bias Current Density Performance of Cubic ZnB-GaN with Hexagonal 4H-SiC Based Impatts

In this paper, a vivid simulated study has been made on 35 GHz Ka-band window frequency in order to judge and compare the DC and high frequency properties of cubic ZnB-GaN with the existing hexagonal 4H-SiC. A flat profile p+pnn+ DDR structure of impatt is chosen and is optimized at a particular bias current density with respect to efficiency and output power taking into consideration the effect of mobile space charge also. The simulated results obtained reveals the strong potentiality of impatts based on both cubic ZnB-GaN and hexagonal 4H-SiC. The DC-to-millimeter wave conversion efficiency for cubic ZnB-GaN impatt obtained is 50% with an estimated output power of 2.83 W at an optimized bias current density of 2.5×108 A/m2. The conversion efficiency and estimated output power in case of hexagonal 4H-SiC impatt obtained is 22.34% and 40 W respectively at an optimum bias current density of 0.06×108 A/m2.

The Competitive Newsvendor Game with Overestimated Demand

The tradition competitive newsvendor game assumes decision makers are rational. However, there are behavioral biases when people make decisions, such as loss aversion, mental accounting and overconfidence. Overestimation of a subject’s own performance is one type of overconfidence. The objective of this research is to analyze the impact of the overestimated demand in the newsvendor competitive game with two players. This study builds a competitive newsvendor game model where newsvendors have private information of their demands, which is overestimated. At the same time, demands of each newsvendor forecasted by a third party institution are available. This research shows that the overestimation leads to demand steal effect, which reduces the competitor’s order quantity. However, the overall supply of the product increases due to overestimation. This study illustrates the boundary condition for the overestimated newsvendor to have the equilibrium order drop due to the demand steal effect from the other newsvendor. A newsvendor who has higher critical fractile will see its equilibrium order decrease with the drop of estimation level from the other newsvendor.

Very High Speed Data Driven Dynamic NAND Gate at 22nm High K Metal Gate Strained Silicon Technology Node
Data driven dynamic logic is the high speed dynamic circuit with low area. The clock of the dynamic circuit is removed and data drives the circuit instead of clock for precharging purpose. This data driven dynamic nand gate is given static forward substrate biasing of Vsupply/2 as well as the substrate bias is connected to the input data, resulting in dynamic substrate bias. The dynamic substrate bias gives the shortest propagation delay with a penalty on the power dissipation. Propagation delay is reduced by 77.8% compared to the normal reverse substrate bias Data driven dynamic nand. Also dynamic substrate biased D3nand’s propagation delay is reduced by 31.26% compared to data driven dynamic nand gate with static forward substrate biasing of Vdd/2. This data driven dynamic nand gate with dynamic body biasing gives us the highest speed with no area penalty and finds its applications where power penalty is acceptable. Also combination of Dynamic and static Forward body bias can be used with reduced propagation delay compared to static forward biased circuit and with comparable increase in an average power. The simulations were done on hspice simulator with 22nm High-k metal gate strained Si technology HP models of Arizona State University, USA.
Support Vector Regression for Retrieval of Soil Moisture Using Bistatic Scatterometer Data at X-Band
An approach was evaluated for the retrieval of soil moisture of bare soil surface using bistatic scatterometer data in the angular range of 200 to 700 at VV- and HH- polarization. The microwave data was acquired by specially designed X-band (10 GHz) bistatic scatterometer. The linear regression analysis was done between scattering coefficients and soil moisture content to select the suitable incidence angle for retrieval of soil moisture content. The 250 incidence angle was found more suitable. The support vector regression analysis was used to approximate the function described by the input output relationship between the scattering coefficient and corresponding measured values of the soil moisture content. The performance of support vector regression algorithm was evaluated by comparing the observed and the estimated soil moisture content by statistical performance indices %Bias, root mean squared error (RMSE) and Nash-Sutcliffe Efficiency (NSE). The values of %Bias, root mean squared error (RMSE) and Nash-Sutcliffe Efficiency (NSE) were found 2.9451, 1.0986 and 0.9214 respectively at HHpolarization. At VV- polarization, the values of %Bias, root mean squared error (RMSE) and Nash-Sutcliffe Efficiency (NSE) were found 3.6186, 0.9373 and 0.9428 respectively.
A Comparison of Bias Among Relaxed Divisor Methods Using 3 Bias Measurements

The apportionment method is used by many countries, to calculate the distribution of seats in political bodies. For example, this method is used in the United States (U.S.) to distribute house seats proportionally based on the population of the electoral district. Famous apportionment methods include the divisor methods called the Adams Method, Dean Method, Hill Method, Jefferson Method and Webster Method. Sometimes the results from the implementation of these divisor methods are unfair and include errors. Therefore, it is important to examine the optimization of this method by using a bias measurement to figure out precise and fair results. In this research we investigate the bias of divisor methods in the U.S. Houses of Representatives toward large and small states by applying the Stolarsky Mean Method. We compare the bias of the apportionment method by using two famous bias measurements: the Balinski and Young measurement and the Ernst measurement. Both measurements have a formula for large and small states. The Third measurement however, which was created by the researchers, did not factor in the element of large and small states into the formula. All three measurements are compared and the results show that our measurement produces similar results to the other two famous measurements.

Stabilization Technique for Multi-Inputs Voltage Sense Amplifiers in Node Sharing Converters

This paper discusses the undesirable charge transfer through the parasitic capacitances of the input transistors in a multi-inputs voltage sense amplifier. Its intrinsic rail-to-rail voltage transitions at the output nodes inevitably disturb the input sides through the capacitive coupling between the outputs and inputs. Then, it can possible degrade the stabilities of the reference voltage levels. Moreover, it becomes more serious in multi-channel systems by altering them for other channels, and so degrades the linearity of the overall systems. In order to alleviate the internal node voltage transition, the internal node stabilization techniques are proposed. It achieves 45% and 40% improvements for node stabilization and input referred disturbance, respectively.

The Effects of Applied Negative Bias Voltage on Structure and Optical Properties of α-C:H Films

Hydrogenated amorphous carbon (a-C:H) films have been synthesized by a radio frequency plasma enhanced chemical vapor deposition (rf-PECVD) technique with different bias voltage from 0.0 to -0.5 kV. The Raman spectra displayed the polymer-like hydrogenated amorphous carbon (PLCH) film with 0.0 to -0.1 and a-C:H films with -0.2 to -0.5 kV of bias voltages. The surface chemical information of all films were studied by X-ray photoelectron spectroscopy (XPS) technique, presented to C-C (sp2 and sp3) and C-O bonds, and relative carbon (C) and oxygen (O) atomics contents. The O contamination had affected on structure and optical properties. The true density of PLCH and a-C:H films were characterized by X-ray refractivity (XRR) method, showed the result as in the range of 1.16-1.73 g/cm3 that depending on an increasing of bias voltage. The hardness was proportional to the true density of films. In addition, the optical properties i.e. refractive index (n) and extinction coefficient (k) of these films were determined by a spectroscopic ellipsometry (SE) method that give formation to in 1.62-2.10 (n) and 0.04-0.15 (k) respectively. These results indicated that the optical properties confirmed the Raman results as presenting the structure changed with applied bias voltage increased.

Highly Optimized Novel High Speed Low Power Barrel Shifter at 22nm Hi K Metal Gate Strained Si Technology Node
This research paper presents highly optimized barrel shifter at 22nm Hi K metal gate strained Si technology node. This barrel shifter is having a unique combination of static and dynamic body bias which gives lowest power delay product. This power delay product is compared with the same circuit at same technology node with static forward biasing at ‘supply/2’ and also with normal reverse substrate biasing and still found to be the lowest. The power delay product of this barrel sifter is .39362X10-17J and is lowered by approximately 78% to reference proposed barrel shifter at 32nm bulk CMOS technology. Power delay product of barrel shifter at 22nm Hi K Metal gate technology with normal reverse substrate bias is 2.97186933X10-17J and can be compared with this design’s PDP of .39362X10-17J. This design uses both static and dynamic substrate biasing and also has approximately 96% lower power delay product compared to only forward body biased at half of supply voltage. The NMOS model used are predictive technology models of Arizona state university and the simulations to be carried out using HSPICE simulator.
Transient Enhanced LDO Voltage Regulator with Improved Feed Forward Path Compensation

Anultra-low power capacitor less low-dropout voltage regulator with improved transient response using gain enhanced feed forward path compensation is presented in this paper. It is based on a cascade of a voltage amplifier and a transconductor stage in the feed forward path with regular error amplifier to form a composite gainenhanced feed forward stage. It broadens the gain bandwidth and thus improves the transient response without substantial increase in power consumption. The proposed LDO, designed for a maximum output current of 100 mA in UMC 180 nm, requires a quiescent current of 69 )A. An undershot of 153.79mV for a load current changes from 0mA to 100mA and an overshoot of 196.24mV for current change of 100mA to 0mA. The settling time is approximately 1.1 )s for the output voltage undershooting case. The load regulation is of 2.77 )V/mA at load current of 100mA. Reference voltage is generated by using an accurate band gap reference circuit of 0.8V.The costly features of SOC such as total chip area and power consumption is drastically reduced by the use of only a total compensation capacitance of 6pF while consuming power consumption of 0.096 mW.

The Reliability of Management Earnings Forecasts in IPO Prospectuses: A Study of Managers’ Forecasting Preferences

This study investigates the reliability of management earnings forecasts with reference to these two ingredients: verifiability and neutrality. Specifically, we examine the biasedness (or accuracy) of management earnings forecasts and company specific characteristics that can be associated with accuracy. Based on sample of 102 IPO prospectuses published for admission on NYSE Euronext Paris from 2002 to 2010, we found that these forecasts are on average optimistic and two of the five test variables, earnings variability and financial leverage are significant in explaining ex post bias. Acknowledging the possibility that the bias is the result of the managers’ forecasting behavior, we then examine whether managers decide to under-predict, over-predict or forecast accurately for self-serving purposes. Explicitly, we examine the role of financial distress, operating performance, ownership by insiders and the economy state in influencing managers’ forecasting preferences. We find that managers of distressed firms seem to over-predict future earnings. We also find that when managers are given more stock options, they tend to under-predict future earnings. Finally, we conclude that the management earnings forecasts are affected by an intentional bias due to managers’ forecasting preferences.

A Floating Gate MOSFET Based Novel Programmable Current Reference

In this paper a scheme is proposed for generating a programmable current reference which can be implemented in the CMOS technology. The current can be varied over a wide range by changing an external voltage applied to one of the control gates of FGMOS (Floating Gate MOSFET). For a range of supply voltages and temperature, CMOS current reference is found to be dependent, this dependence is compensated by subtracting two current outputs with the same dependencies on the supply voltage and temperature. The system performance is found to improve with the use of FGMOS. Mathematical analysis of the proposed circuit is done to establish supply voltage and temperature independence. Simulation and performance evaluation of the proposed current reference circuit is done using TANNER EDA Tools. The current reference shows the supply and temperature dependencies of 520 ppm/V and 312 ppm/oC, respectively. The proposed current reference can operate down to 0.9 V supply.

Internal Node Stabilization for Voltage Sense Amplifiers in Multi-Channel Systems

This paper discusses the undesirable charge transfer by the parasitic capacitances of the input transistors in a voltage sense amplifier. Due to its intrinsic rail-to-rail voltage transition, the input sides are inevitably disturbed. It can possible disturb the stabilities of the reference voltage levels. Moreover, it becomes serious in multi-channel systems by altering them for other channels, and so degrades the linearity of the systems. In order to alleviate the internal node voltage transition, the internal node stabilization technique is proposed by utilizing an additional biasing circuit. It achieves 47% and 43% improvements for node stabilization and input referred disturbance, respectively.

The Aspect of the Human Bias in Decision Making within Quality Management Systems & LEAN Theory

This paper provides a literature review to document the state of the art with respect to handling “human bias” in decision making within the established quality management systems (QMS) and LEAN theory, in the context of shipbuilding. Previous research shows that in shipbuilding there is a huge deviation from the planned man-hours under the project management to the actual man-hours used because of errors in planning and reworks caused by human bias in the information flows, among others. This reduces the efficiency, and increases operational costs. Thus, the research question is how QMS and LEAN handle biases. The findings show the gap in studying the integration of methods to handle human bias in decision making into QMS and lean, not only within shipbuilding, but in general. Theoretical and practical implications are discussed for researchers and practitioners in the areas of decision making, QMS and LEAN, and future research is suggested.

How Stock Market Reacts to Guidance Revisions and Actual Earnings Surprises

According to the existing literature, companies manage analysts’ expectations of their future earnings by issuing pessimistic earnings guidance to meet the expectations. Consequently, one could expect that markets price this pessimistic bias in advance and penalize companies more for lowering the guidance than reward for beating the guidance. In this paper we confirm this empirically. In addition we show that although guidance revisions have a statistically significant relation to stock returns, that is not the case with the actual earnings surprise. Reason for this could be that, after the annual earnings report also information on future earnings power is given at the same time.

Low Leakage MUX/XOR Functions Using Symmetric and Asymmetric FinFETs
In this paper, FinFET devices are analyzed with emphasis on sub-threshold leakage current control. This is achieved through proper biasing of the back gate, and through the use of asymmetric work functions for the four terminal FinFET devices. We are also examining different configurations of multiplexers and XOR gates using transistors of symmetric and asymmetric work functions. Based on extensive characterization data for MUX circuits, our proposed configuration using symmetric devices lead to leakage current and delay improvements of 65% and 47% respectively compared to results in the literature. For XOR gates, a 90% improvement in the average leakage current is achieved by using asymmetric devices. All simulations are based on a 25nm FinFET technology using the University of Florida UFDG model.
GMDH Modeling Based on Polynomial Spline Estimation and Its Applications

GMDH algorithm can well describe the internal structure of objects. In the process of modeling, automatic screening of model structure and variables ensure the convergence rate.This paper studied a new GMDH model based on polynomial spline  stimation. The polynomial spline function was used to instead of the transfer function of GMDH to characterize the relationship between the input variables and output variables. It has proved that the algorithm has the optimal convergence rate under some conditions. The empirical results show that the algorithm can well forecast Consumer Price Index (CPI).

Quantifying and Adjusting the Effects of Publication Bias in Continuous Meta-Analysis

This study uses simulated meta-analysis to assess the effects of publication bias on meta-analysis estimates and to evaluate the efficacy of the trim and fill method in adjusting for these biases. The estimated effect sizes and the standard error were evaluated in terms of the statistical bias and the coverage probability. The results demonstrate that if publication bias is not adjusted it could lead to up to 40% bias in the treatment effect estimates. Utilization of the trim and fill method could reduce the bias in the overall estimate by more than half. The method is optimum in presence of moderate underlying bias but has minimal effects in presence of low and severe publication bias. Additionally, the trim and fill method improves the coverage probability by more than half when subjected to the same level of publication bias as those of the unadjusted data. The method however tends to produce false positive results and will incorrectly adjust the data for publication bias up to 45 % of the time. Nonetheless, the bias introduced into the estimates due to this adjustment is minimal

The Influence of Substrate Bias on the Mechanical Properties of a W- and S-containing DLC-based Solid-lubricant Film
A diamond-like carbon (DLC) based solid-lubricant film was designed and DLC films were successfully prepared using a microwave plasma enhanced magnetron sputtering deposition technology. Post-test characterizations including Raman spectrometry, X-ray diffraction, nano-indentation test, adhesion test, friction coefficient test were performed to study the influence of substrate bias voltage on the mechanical properties of the W- and S-doped DLC films. The results indicated that the W- and S-doped DLC films also had the typical structure of DLC films and a better mechanical performance achieved by the application of a substrate bias of -200V.
Expert Witness Testimony in the Battered Woman Syndrome
The Expert Witness Testimony in the Battered Woman Syndrome Expert witness testimony (EWT) is a kind of information given by an expert specialized in the field (here in BWS) to the jury in order to help the court better understand the case. EWT does not always work in favor of the battered women. Two main decision-making models are discussed in the paper: the Mathematical model and the Explanation model. In the first model, the jurors calculate ″the importance and strength of each piece of evidence″ whereas in the second model they try to integrate the EWT with the evidence and create a coherent story that would describe the crime. The jury often misunderstands and misjudges battered women for their action (or in this case inaction). They assume that these women are masochists and accept being mistreated for if a man abuses a woman constantly, she should and could divorce him or simply leave at any time. The research in the domain found that indeed, expert witness testimony has a powerful influence on juror’s decisions thus its quality needs to be further explored. One of the important factors that need further studies is a bias called the dispositionist worldview (a belief that what happens to people is of their own doing). This kind of attributional bias represents a tendency to think that a person’s behavior is due to his or her disposition, even when the behavior is clearly attributed to the situation. Hypothesis The hypothesis of this paper is that if a juror has a dispositionist worldview then he or she will blame the rape victim for triggering the assault. The juror would therefore commit the fundamental attribution error and believe that the victim’s disposition caused the rape and not the situation she was in. Methods The subjects in the study were 500 randomly sampled undergraduate students from McGill, Concordia, Université de Montréal and UQAM. Dispositional Worldview was scored on the Dispositionist Worldview Questionnaire. After reading the Rape Scenarios, each student was asked to play the role of a juror and answer a questionnaire consisting of 7 questions about the responsibility, causality and fault of the victim. Results The results confirm the hypothesis which states that if a juror has a dispositionist worldview then he or she will blame the rape victim for triggering the assault. By doing so, the juror commits the fundamental attribution error because he will believe that the victim’s disposition, and not the constraints or opportunities of the situation, caused the rape scenario.
An Efficient VLSI Design Approach to Reduce Static Power using Variable Body Biasing

In CMOS integrated circuit design there is a trade-off between static power consumption and technology scaling. Recently, the power density has increased due to combination of higher clock speeds, greater functional integration, and smaller process geometries. As a result static power consumption is becoming more dominant. This is a challenge for the circuit designers. However, the designers do have a few methods which they can use to reduce this static power consumption. But all of these methods have some drawbacks. In order to achieve lower static power consumption, one has to sacrifice design area and circuit performance. In this paper, we propose a new method to reduce static power in the CMOS VLSI circuit using Variable Body Biasing technique without being penalized in area requirement and circuit performance.

Analysis of Target Location Estimation in High Performance Radar System
In this paper, an analysis of a target location estimation system using the best linear unbiased estimator (BLUE) for high performance radar systems is presented. In synthetic environments, we are here concerned with three key elements of radar system modeling, which makes radar systems operates accurately in strategic situation in virtual ground. Radar Cross Section (RCS) modeling is used to determine the actual amount of electromagnetic waves that are reflected from a tactical object. Pattern Propagation Factor (PPF) is an attenuation coefficient of the radar equation that contains the reflection from the surface of the earth, the diffraction, the refraction and scattering by the atmospheric environment. Clutter is the unwanted echoes of electronic systems. For the data fusion of output results from radar detection in synthetic environment, BLUE is used and compared with the mean values of each simulation results. Simulation results demonstrate the performance of the radar system.
Off-State Leakage Power Reduction by Automatic Monitoring and Control System
This paper propose a new circuit design which monitor total leakage current during standby mode and generates the optimal reverse body bias voltage, by using the adaptive body bias (ABB) technique to compensate die-to-die parameter variations. Design details of power monitor are examined using simulation framework in 65nm and 32nm BTPM model CMOS process. Experimental results show the overhead of proposed circuit in terms of its power consumption is about 10 μW for 32nm technology and about 12 μW for 65nm technology at the same power supply voltage as the core power supply. Moreover the results show that our proposed circuit design is not far sensitive to the temperature variations and also process variations. Besides, uses the simple blocks which offer good sensitivity, high speed, the continuously feedback loop.
Power Reduction by Automatic Monitoring and Control System in Active Mode
This paper describes a novel monitoring scheme to minimize total active power in digital circuits depend on the demand frequency, by adjusting automatically both supply voltage and threshold voltages based on circuit operating conditions such as temperature, process variations, and desirable frequency. The delay monitoring results, will be control and apply so as to be maintained at the minimum value at which the chip is able to operate for a given clock frequency. Design details of power monitor are examined using simulation framework in 32nm BTPM model CMOS process. Experimental results show the overhead of proposed circuit in terms of its power consumption is about 40 μW for 32nm technology; moreover the results show that our proposed circuit design is not far sensitive to the temperature variations and also process variations. Besides, uses the simple blocks which offer good sensitivity, high speed, the continuously feedback loop. This design provides up to 40% reduction in power consumption in active mode.

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