Open Science Research Excellence

Open Science Index

Commenced in January 2007 Frequency: Monthly Edition: International Paper Count: 12

12
10009775
A 0.9 V, High-Speed, Low-Power Tunable Gain Current Mirror
Abstract:
A high-speed current mirror with low-power method of adjusting current gain is presented. The current mirror provides continuous gain adjustment; yet, its gain can simply be programmed digitally, as well. The structure features the ever interesting merits of linear-in-dB gain control scheme and low power/voltage operation. The performance of proposed structure is verified through the simulation in TSMC 0.18 µm CMOS Technology. The proposed tunable gain current mirror structure draws only 18 µW from 0.9 V power supply and can operate at high frequencies up to 550 MHz in the worst case condition of maximum gain setting.
11
10004900
Low Voltage Ride through Capability Techniques for DFIG-Based Wind Turbines
Abstract:
Due to the drastic increase of the wind turbines installed capacity; the grid codes are increasing the restrictions aiming to treat the wind turbines like other conventional sources sooner. In this paper, an intensive review has been presented for different techniques used to add low voltage ride through capability to Doubly Fed Induction Generator (DFIG) wind turbine. A system model with 1.5 MW DFIG wind turbine is constructed and simulated using MATLAB/SIMULINK to explore the effectiveness of the reviewed techniques.
10
10004203
An Accurate, Wide Dynamic Range Current Mirror Structure
Abstract:

In this paper, a low voltage high performance current mirror is presented. Its most important specifications, which are improved in this work, are analyzed and formulated proving that it has such outstanding merits as: Very low input resistance of 26mΩ, very wide current dynamic range of 8 decades from 10pA to 1mA (160dB) together with an extremely low current copy error of less than 0.6ppm, and very low input and output voltages. Furthermore, the proposed current mirror bandwidth is 944MHz utilizing very low power consumption (267μW) and transistors count. HSPICE simulation results are performed using TSMC 0.18μm CMOS technology utilizing 1.8V single power supply, confirming the theoretically proved outstanding performance of the proposed current mirror. Monte Carlo simulation of its most important parameter is also examined showing its sufficiently resistance against technology process variations.

9
10005324
Contingency Screening Using Risk Factor Considering Transmission Line Outage
Abstract:
Power system security analysis is the most time demanding process due to large number of possible contingencies that need to be analyzed.  In a power system, any contingency resulting in security violation such as line overload or low voltage may occur for a number of reasons at any time.  To efficiently rank a contingency, both probability and the extent of security violation must be considered so as not to underestimate the risk associated with the contingency. This paper proposed a contingency ranking method that take into account the probabilistic nature of power system and the severity of contingency by using a newly developed method based on risk factor.  The proposed technique is implemented on IEEE 24-bus system.
8
5640
High-Resolution 12-Bit Segmented Capacitor DAC in Successive Approximation ADC
Abstract:
This paper study the segmented split capacitor Digital-to-Analog Converter (DAC) implemented in a differentialtype 12-bit Successive Approximation Analog-to-Digital Converter (SA-ADC). The series capacitance split array method employed as it reduced the total area of the capacitors required for high resolution DACs. A 12-bit regular binary array structure requires 2049 unit capacitors (Cs) while the split array needs 127 unit Cs. These results in the reduction of the total capacitance and power consumption of the series split array architectures as to regular binary-weighted structures. The paper will show the 12-bit DAC series split capacitor with 4-bit thermometer coded DAC architectures as well as the simulation and measured results.
7
11481
Low Voltage High Gain Linear Class AB CMOS OTA with DC Level Input Stage
Abstract:

This paper presents a low-voltage low-power differential linear transconductor with near rail-to-rail input swing. Based on the current-mirror OTA topology, the proposed transconductor combines the Flipped Voltage Follower (FVF) technique to linearize the transconductor behavior that leads to class- AB linear operation and the virtual transistor technique to lower the effective threshold voltages of the transistors which offers an advantage in terms of low supply requirement. Design of the OTA has been discussed. It operates at supply voltages of about ±0.8V. Simulation results for 0.18μm TSMC CMOS technology show a good input range of 1Vpp with a high DC gain of 81.53dB and a total harmonic distortion of -40dB at 1MHz for an input of 1Vpp. The main aim of this paper is to present and compare new OTA design with high transconductance, which has a potential to be used in low voltage applications.

6
5764
Detection of Near Failure Winding due to Deformation in 33/11kV Power Transformer by using Low Voltage Impulse (LVI) Test Method and Validated through Untanking
Abstract:
Power transformer consists of components which are under consistent thermal and electrical stresses. The major component which degrades under these stresses is the paper insulation of the power transformer. At site, lightning impulses and cable faults may cause the winding deformation. In addition, the winding may deform due to impact during transportation. A deformed winding will excite more stress to its insulating paper thus will degrade it. Insulation degradation will shorten the life-span of the transformer. Currently there are two methods of detecting the winding deformation which are Sweep Frequency Response Analysis (SFRA) and Low Voltage Impulse Test (LVI). The latter injects current pulses to the winding and capture the admittance plot. In this paper, a transformer which experienced overheating and arcing was identified, and both SFRA and LVI were performed. Next, the transformer was brought to the factory for untanking. The untanking results revealed that the LVI is more accurate than the SFRA method for this case study.
5
12128
A Novel Low Power Very Low Voltage High Performance Current Mirror
Abstract:

In this paper a novel high output impedance, low input impedance, wide bandwidth, very simple current mirror with input and output voltage requirements less than that of a simple current mirror is presented. These features are achieved with very simple structure avoiding extra large node impedances to ensure high bandwidth operation. The circuit's principle of operation is discussed and compared to simple and low voltage cascode (LVC) current mirrors. Such outstanding features of this current mirror as high output impedance ~384K, low input impedance~6.4, wide bandwidth~178MHz, low input voltage ~ 362mV, low output voltage ~ 38mV and low current transfer error ~4% (all at 50μA) makes it an outstanding choice for high performance applications. Simulation results in BSIM 0.35μm CMOS technology with HSPICE are given in comparison with simple, and LVC current mirrors to verify and validate the performance of the proposed current mirror.

4
4705
A Practical Method for Load Balancing in the LV Distribution Networks Case Study: Tabriz Electrical Network
Abstract:

In this paper, a new efficient method for load balancing in low voltage distribution systems is presented. The proposed method introduces an improved Leap-frog method for optimization. The proposed objective function includes the difference between three phase currents, as well as two other terms to provide the integer property of the variables; where the latter are the status of the connection of loads to different phases. Afterwards, a new algorithm is supplemented to undertake the integer values for the load connection status. Finally, the method is applied to different parts of Tabriz low voltage network, where the results have shown the good performance of the proposed method.

3
3530
On the Reliability of Low Voltage Network with Small Scale Distributed Generators
Abstract:
Since the 80s huge efforts have been made to utilize renewable energy sources to generate electric power. This paper reports some aspects of integration of the distributed generators into the low voltage distribution networks. An assessment of impact of the distributed generators on the reliability indices of low voltage network is performed. Results obtained from case study using low voltage network, are presented and discussed.
2
1112
Modeling Low Voltage Power Line as a Data Communication Channel
Abstract:
Power line communications may be used as a data communication channel in public and indoor distribution networks so that it does not require the installing of new cables. Industrial low voltage distribution network may be utilized for data transfer required by the on-line condition monitoring of electric motors. This paper presents a pilot distribution network for modeling low voltage power line as data transfer channel. The signal attenuation in communication channels in the pilot environment is presented and the analysis is done by varying the corresponding parameters for the signal attenuation.
1
8724
Proposal for a Ultra Low Voltage NAND gate to withstand Power Analysis Attacks
Abstract:

In this paper we promote the Ultra Low Voltage (ULV) NAND gate to replace either partly or entirely the encryption block of a design to withstand power analysis attack.

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