Open Science Research Excellence

Jeong Yun Seo

Publications

2

Publications

2
10008332
A Study on ESD Protection Circuit Applying Silicon Controlled Rectifier-Based Stack Technology with High Holding Voltage
Abstract:
In this study, an improved Electrostatic Discharge (ESD) protection circuit with low trigger voltage and high holding voltage is proposed. ESD has become a serious problem in the semiconductor process because the semiconductor density has become very high these days. Therefore, much research has been done to prevent ESD. The proposed circuit is a stacked structure of the new unit structure combined by the Zener Triggering (SCR ZTSCR) and the High Holding Voltage SCR (HHVSCR). The simulation results show that the proposed circuit has low trigger voltage and high holding voltage. And the stack technology is applied to adjust the various operating voltage. As the results, the holding voltage is 7.7 V for 2-stack and 10.7 V for 3-stack.
Keywords:
ESD, SCR, latch-up, power clamp, holding voltage.
1
10008991
A Silicon Controlled Rectifier-Based ESD Protection Circuit with High Holding Voltage and High Robustness Characteristics
Abstract:
In this paper, a Silicon Controlled Rectifier (SCR)-based Electrostatic Discharge (ESD) protection circuit with high holding voltage and high robustness characteristics is proposed. Unlike conventional SCR, the proposed circuit has low trigger voltage and high holding voltage and provides effective ESD protection with latch-up immunity. In addition, the TCAD simulation results show that the proposed circuit has better electrical characteristics than the conventional SCR. A stack technology was used for voltage-specific applications. Consequentially, the proposed circuit has a trigger voltage of 17.60 V and a holding voltage of 3.64 V.
Keywords:
ESD, SCR, latch-up, power clamp, holding voltage.