A Novel VLSI Architecture of Hybrid Image Compression Model based on Reversible Blockade Transform
Image compression can improve the performance of
the digital systems by reducing time and cost in image storage
and transmission without significant reduction of the image quality.
Furthermore, the discrete cosine transform has emerged as the new
state-of-the art standard for image compression. In this paper, a
hybrid image compression technique based on reversible blockade
transform coding is proposed. The technique, implemented over
regions of interest (ROIs), is based on selection of the coefficients
that belong to different transforms, depending on the coefficients is
proposed. This method allows: (1) codification of multiple kernals
at various degrees of interest, (2) arbitrary shaped spectrum,and (3)
flexible adjustment of the compression quality of the image and the
background. No standard modification for JPEG2000 decoder was
required. The method was applied over different types of images.
Results show a better performance for the selected regions, when
image coding methods were employed for the whole set of images.
We believe that this method is an excellent tool for future image
compression research, mainly on images where image coding can
be of interest, such as the medical imaging modalities and several
multimedia applications. Finally VLSI implementation of proposed
method is shown. It is also shown that the kernal of Hartley and
Cosine transform gives the better performance than any other model.
VLSI, Discrete Cosine Transform, JPEG, Hartleytransform, Radon Transform