Off-State Leakage Power Reduction by Automatic Monitoring and Control System
This paper propose a new circuit design which
monitor total leakage current during standby mode and generates the
optimal reverse body bias voltage, by using the adaptive body bias
(ABB) technique to compensate die-to-die parameter variations.
Design details of power monitor are examined using simulation
framework in 65nm and 32nm BTPM model CMOS process.
Experimental results show the overhead of proposed circuit in terms
of its power consumption is about 10 μW for 32nm technology and
about 12 μW for 65nm technology at the same power supply voltage
as the core power supply. Moreover the results show that our
proposed circuit design is not far sensitive to the temperature
variations and also process variations. Besides, uses the simple
blocks which offer good sensitivity, high speed, the continuously
leakage current, leakage power monitor, body
biasing, low power