Robust Statistics Based Algorithm to Remove Salt and Pepper Noise in Images
In this paper, a robust statistics based filter to remove salt and pepper noise in digital images is presented. The function of the algorithm is to detect the corrupted pixels first since the impulse noise only affect certain pixels in the image and the remaining pixels are uncorrupted. The corrupted pixels are replaced by an estimated value using the proposed robust statistics based filter. The proposed method perform well in removing low to medium density impulse noise with detail preservation upto a noise density of 70% compared to standard median filter, weighted median filter, recursive weighted median filter, progressive switching median filter, signal dependent rank ordered mean filter, adaptive median filter and recently proposed decision based algorithm. The visual and quantitative results show the proposed algorithm outperforms in restoring the original image with superior preservation of edges and better suppression of impulse noise
Image denoising, Nonlinear filter, Robust Statistics,and Salt and Pepper Noise.
Hybrid Prefix Adder Architecture for Minimizing the Power Delay Product
Parallel Prefix addition is a technique for improving
the speed of binary addition. Due to continuing integrating intensity
and the growing needs of portable devices, low-power and highperformance
designs are of prime importance. The classical parallel
prefix adder structures presented in the literature over the years
optimize for logic depth, area, fan-out and interconnect count of logic
circuits. In this paper, a new architecture for performing 8-bit, 16-bit
and 32-bit Parallel Prefix addition is proposed. The proposed prefix
adder structures is compared with several classical adders of same
bit width in terms of power, delay and number of computational
nodes. The results reveal that the proposed structures have the least
power delay product when compared with its peer existing Prefix
adder structures. Tanner EDA tool was used for simulating the adder
designs in the TSMC 180 nm and TSMC 130 nm technologies.
Parallel Prefix Adder (PPA), Dot operator, Semi-Dotoperator, Complementary Metal Oxide Semiconductor (CMOS),Odd-dot operator, Even-dot operator, Odd-semi-dot operator andEven-semi-dot operator.